arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal

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This reset signal controls the Marvell 1512 1G PHY.

Note that current implementation queries the PHY over the MDIO bus
(get_phy_device() call from of_mdiobus_register_phy()) before reset
signal deassert. If the PHY reset signal is asserted at boot time, PHY
registration fails. So current code relies on the bootloader to deassert
the reset signal.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>

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Baruch Siach 2018-10-16 13:50:53 +03:00 • committed by Gregory CLEMENT

parent b597a6f542

commit babc5544c2

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arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts

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