ARM: tegra: Enable PCIe controller on Beaver

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PCIe lane 0 is connected to an onboard Gigabit Ethernet (RTL8168evl) and
lane 4 is routed to the board's miniPCIe slot.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

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Thierry Reding 2013-08-09 16:49:28 +02:00 • committed by Stephen Warren

parent 89e7ada416

commit bb034cb5eb

1 changed files with 21 additions and 0 deletions

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arch/arm/boot/dts/tegra30-beaver.dts

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