arm64: dts: rockchip: Correct MIPI DPHY PLL clock on rk3399

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There is a further gate in between the mipidphy reference clock and the
actual ref-clock input to the dsi host, making the clock hirarchy look like
clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll

Fix the clock reference so that the whole clock subtree gets enabled when
the dsi host needs it.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
[amended commit message]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

...

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Nickey Yang 2017-09-18 17:05:37 +08:00 • committed by Heiko Stuebner

parent 6354a06cba

commit bb4e6ff01a

1 changed files with 1 additions and 1 deletions

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arch/arm64/boot/dts/rockchip/rk3399.dtsi

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