clk: tegra: Fix sor1_out clock implementation

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This clock was previously called sor1_src and was modelled as an input
to the sor1 module clock. However, it's really an output clock that can
be fed either from the safe, the sor1_pad_clkout or the sor1 module
clocks. sor1 itself can take input from either of the display PLLs.

The same implementation for the sor1_out clock is used on Tegra186, so
this nicely lines up both SoC generations to deal with this clock in a
uniform way.

Signed-off-by: Thierry Reding <treding@nvidia.com>

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This commit is contained in:

Thierry Reding 2017-08-30 12:21:04 +02:00

parent 1d7e2c8e54

commit bc2e4d2986

2 changed files with 47 additions and 16 deletions

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16

drivers/clk/tegra/clk-tegra-periph.c

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47

drivers/clk/tegra/clk-tegra210.c

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