drm/i915/edp: enable eDP MSO during link training

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If the source and sink support MSO, enable it during link training.

v4: Divide DRRS pixel clock by link count before M/N calculation

v3: Adjust timings, refer to splitter

v2: Limit MSO to pipe A using ->pipe_mask

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2711
Cc: Nischal Varide <nischal.varide@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/66da48b4b3c5ccffaac7989097cd96d6c6af8243.1614682842.git.jani.nikula@intel.com

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This commit is contained in:

Jani Nikula 2021-03-02 13:03:02 +02:00

parent 512005d949

commit bc71194e88

3 changed files with 89 additions and 4 deletions

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37

drivers/gpu/drm/i915/display/intel_ddi.c

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13

drivers/gpu/drm/i915/display/intel_display.c

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43

drivers/gpu/drm/i915/display/intel_dp.c

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