drm/i915/icl: Do read-modify-write as needed during MG PLL programming

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Some MG PLL registers have fields that need to be preserved at their HW
default or BIOS programmed values. So make sure we preserve them.

v2:
- Add comment to icl_mg_pll_write() explaining the need for register
  masks. (Vandita)
- Fix patchwork checkpatch warning.

v3:
- Rebase on drm-tip.

Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com> (v1)
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180619164115.7835-1-imre.deak@intel.com

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This commit is contained in:

Imre Deak 2018-06-19 19:41:15 +03:00

parent 9fc59bae0f

commit bd99ce085f

2 changed files with 48 additions and 4 deletions

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13

drivers/gpu/drm/i915/i915_reg.h

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39

drivers/gpu/drm/i915/intel_dpll_mgr.c

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