net/mlx5: DR, Fix potential shift wrapping of 32-bit value

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Fix 32-bit variable shift wrapping in dr_ste_v0_get_miss_addr.

Fixes: 6b93b400aa ("net/mlx5: DR, Move STEv0 setters and getters")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

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Yevgeny Kliteynik 2021-01-20 02:53:28 +02:00 • committed by Saeed Mahameed

parent 46eb3c108f

commit bdbc13c204

1 changed files with 2 additions and 2 deletions

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drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c

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