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ARM: OMAP3: Fixed spurious IRQ issue for GPIO interrupts
Flush posted write to IRQSTATUS register in GPIO IRQ handler. This eliminates the below error for all peripherals that use GPIO interrupts. <4>Spurious irq 95: 0xffffffdf, please flush posted write for irq 31 Signed-off-by: Roger Quadros <ext-roger.quadros@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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