drm/i915/dip: Enable Common SDP Transmission line

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Enable programming of the common SDP transmission line on platforms that
support it. Compute and program the common base transmission line and
per-SDP stagger values from the crtc state during modeset, and disable the
feature on pipe disable.

Currently, the stagger values are set as per the default policy of the
Hardware. This can be optimized later if we come up with a specific driver
policy to sequence the SDPs better.

v2: Add WARN if the Common Transmission Line is more than Guardband +
SCL. (Suraj)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260915164657.3429075-12-ankit.k.nautiyal@intel.com

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Ankit Nautiyal 2026-09-15 22:16:52 +05:30

parent 589a07df22

commit bfa5972380

2 changed files with 99 additions and 0 deletions

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3

drivers/gpu/drm/i915/display/intel_ddi.c

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96

drivers/gpu/drm/i915/display/intel_dip.c

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