Amlogic clock updates for v5.9:

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* g12: add neural network accelerator clock sources
 * meson8: remove critical flag for main PLL divider
 * meson8: add video decoder clock gates
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Merge tag 'clk-meson-v5.9-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull Amlogic clk driver updates from Jerome Brunet:

 - g12: add neural network accelerator clock sources
 - meson8: remove critical flag for main PLL divider
 - meson8: add video decoder clock gates

* tag 'clk-meson-v5.9-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: meson8b: add the vclk2_en gate clock
  clk: meson: meson8b: add the vclk_en gate clock
  clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
  clk: meson: g12a: Add support for NNA CLK source clocks
  dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs

...

This commit is contained in:

Stephen Boyd 2020-07-21 00:58:07 -07:00

parent b3a9e3b962 2568528f55

commit bfd35bf9ce

5 changed files with 180 additions and 19 deletions

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119

drivers/clk/meson/g12a.c

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7

drivers/clk/meson/g12a.h

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67

drivers/clk/meson/meson8b.c

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4

drivers/clk/meson/meson8b.h

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2

include/dt-bindings/clock/g12a-clkc.h

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