drm/amdgpu/soc15: return cached values for some registers (v2)

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Required for SR-IOV and saves MMIO transactions.

v2: drop cached RB harvest registers

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Alex Deucher 2017-03-24 15:05:07 -04:00

parent 2572c24ca9

commit c013cea2df

1 changed files with 22 additions and 8 deletions

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drivers/gpu/drm/amd/amdgpu/soc15.c

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