Amlogic clock updates for v5.17

* Fix MPLL0 gxbb SDM enable
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Merge tag 'clk-meson-v5.17-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull an Amlogic clock driver update from Jerome Brunet:

 - Fix MPLL0 gxbb SDM enable

* tag 'clk-meson-v5.17-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB
This commit is contained in:
Stephen Boyd 2021-12-28 21:36:40 -08:00
commit c1001a62f2