clk: renesas: rcar-gen3: Correct parent clock of HS-USB

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According to the R-Car Gen3 Hardware Manual Rev. 1.00, and the RZ/G2
Hardware Manual Rev. 0.61, the parent clock of the HS-USB module
clocks on R-Car Gen3 and RZ/G2 SoCs is S3D2.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[takeshi: Update R-Car H3, M3-N, and E3]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update RZ/G2M and RZ/G2E]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

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This commit is contained in:

Kazuya Mizuguchi 2018-07-25 18:07:05 +09:00 • committed by Geert Uytterhoeven

parent 8d36fdcce2

commit c2182095c8

6 changed files with 7 additions and 7 deletions

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drivers/clk/renesas/r8a774a1-cpg-mssr.c

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drivers/clk/renesas/r8a774c0-cpg-mssr.c

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drivers/clk/renesas/r8a7795-cpg-mssr.c

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drivers/clk/renesas/r8a7796-cpg-mssr.c

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drivers/clk/renesas/r8a77965-cpg-mssr.c

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drivers/clk/renesas/r8a77990-cpg-mssr.c

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