From c23ee65d20ff2afcf6108106a58ff0155e48e10e Mon Sep 17 00:00:00 2001 From: Ankit Nautiyal Date: Tue, 15 Sep 2026 22:16:44 +0530 Subject: [PATCH] drm/i915/intel_dip: Add check for DP encoder At the moment, the common register for programming Transmission line for Extended Metadata Packet and Adaptive-Sync Secondary Data Packet (EMP_AS_SDP_TL) is only used to program Adaptive-Sync SDP (AS SDP). Since VRR and Video Timing Extended Metadat Packet (VTEMP) are not yet implemented for HDMI, add an explicit check to write the register only for DP encoders (that may use AS SDP) and reset the register for non-DP encoders. In subsequent changes, instead of directly writing the value, appropriate helpers will be called, that will supply the transmission line for these packets. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal Link: https://patch.msgid.link/20260915164657.3429075-4-ankit.k.nautiyal@intel.com --- drivers/gpu/drm/i915/display/intel_dip.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c index 2e2bdb2b199c..b28352a9e23f 100644 --- a/drivers/gpu/drm/i915/display/intel_dip.c +++ b/drivers/gpu/drm/i915/display/intel_dip.c @@ -26,14 +26,19 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + u32 transmission_line = 0; if (!HAS_EMP_AS_SDP_TL(display)) return; /* - * Since currently we support VRR only for DP/eDP, so this is programmed - * only for Adaptive Sync SDP to Vsync start. + * Since we currently support VRR only for DP/eDP, program the register + * for Adaptive Sync SDP using vsync start. For non-DP encoders, + * the register is reset to 0. */ + if (intel_crtc_has_dp_encoder(crtc_state)) + transmission_line = crtc_state->vrr.vsync_start; + intel_de_write(display, EMP_AS_SDP_TL(display, cpu_transcoder), - EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start)); + EMP_AS_SDP_DB_TL(transmission_line)); }