iio: xilinx-xadc: Add basic support for Ultrascale System Monitor

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The xilinx-xadc IIO driver currently has support for the XADC in the Xilinx
7 series FPGAs. The system-monitor is the equivalent to the XADC in the
Xilinx UltraScale and UltraScale+ FPGAs.

The IP designers did a good job at maintaining backwards compatibility and
only minor changes are required to add basic support for the system-monitor
core.

The non backwards compatible changes are:
  * Register map offset was moved from 0x200 to 0x400
  * Only one ADC compared to two in the XADC
  * 10 bit ADC instead of 12 bit ADC
  * Two of the channels monitor different supplies

Add the necessary logic to accommodate these changes to support the
system-monitor in the XADC driver.

Note that this patch does not include support for some new features found
in the system-monitor like additional alarms, user supply monitoring and
secondary system-monitor access. This might be added at a later time.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Tested-by: Anand Ashok Dumbre <anandash@xilinx.com>
Reviewed-by: Anand Ashok Dumbre <anandash@xilinx.com>
Link: https://lore.kernel.org/r/20200922134624.13191-2-lars@metafoo.de
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

...

This commit is contained in:

Lars-Peter Clausen 2020-09-22 15:46:24 +02:00 • committed by Jonathan Cameron

parent d0dc4c80b9

commit c2b7720a79

4 changed files with 171 additions and 58 deletions

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11

drivers/iio/adc/Kconfig

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203

drivers/iio/adc/xilinx-xadc-core.c

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9

drivers/iio/adc/xilinx-xadc-events.c

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6

drivers/iio/adc/xilinx-xadc.h

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