clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks

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On the H6, the MMC module clocks are fixed in the new timing mode,
i.e. they do not have a bit to select the mode. These clocks have
a 2x divider somewhere between the clock and the MMC module.

To be consistent with other SoCs supporting the new timing mode,
we model the 2x divider as a fixed post-divider on the MMC module
clocks.

This patch adds the post-dividers to the MMC clocks, following the
approach on A64.

Fixes: 524353ea48 ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

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Icenowy Zheng 2018-08-20 21:40:13 +08:00 • committed by Maxime Ripard

parent a528872dbb

commit c2ff8383cc

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drivers/clk/sunxi-ng/ccu-sun50i-h6.c

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