ARMv7: Add extra barriers for flush_cache_all compressed/head.S

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The flush_cache_all function on ARMv7 is implemented as a series of
cache operations by set/way. These are not guaranteed to be ordered with
previous memory accesses, requiring a DMB. This patch also adds barriers
for the TLB operations in compressed/head.S

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

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Catalin Marinas 2008-11-06 13:23:07 +00:00

parent 2bedbdf414

commit c30c2f99e1

2 changed files with 12 additions and 4 deletions

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14

arch/arm/boot/compressed/head.S

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2

arch/arm/mm/cache-v7.S

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