clk: imx: imx8mm: mark sys_pll1/2 as fixed clock

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According Architecture definition guide, SYS_PLL1 is fixed at
800MHz, SYS_PLL2 is fixed at 1000MHz, so let's use imx_clk_fixed
to register the clocks and drop code that could change the rate.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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Peng Fan 2019-10-24 01:58:37 +00:00 • committed by Shawn Guo

parent e8688fe8df

commit c332481f62

1 changed files with 20 additions and 26 deletions

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drivers/clk/imx/clk-imx8mm.c

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