drm/i915/skl: Program PLL for edp1.4 intermediate frequencies

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v2: Making the link_clock half in switch inline with the DPLL_CTRL1_* macros
(Ville)

Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Sonika Jindal 2015-02-21 11:12:13 +05:30 • committed by Daniel Vetter

parent a8f3ef6197

commit c3346ef688

1 changed files with 22 additions and 6 deletions

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drivers/gpu/drm/i915/intel_dp.c

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