drm/amd/display: Fix pflip IRQ status after gpu reset.

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Problem:
After GPU reset pflip completion IRQ is disabled and hence
any subsequent mode set or plane update leads to hang.

Fix:
Unless acrtc->otg_inst is initialized to -1 during display
block initializtion then durng resume from GPU reset
amdgpu_irq_gpu_reset_resume_helper will override CRTC 0 pflip
IRQ value with whatever value was on every other unused CRTC because
dm_irq_state will do irq_source = dal_irq_type + acrtc->otg_inst
where acrtc->otg_inst will be 0 for every unused CRTC.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Andrey Grodzovsky 2018-09-12 16:38:57 -04:00 • committed by Alex Deucher

parent 0c70dd4985

commit c37e2d29f0

1 changed files with 1 additions and 0 deletions

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drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

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