perf/x86/msr: Add Jasper Lake support

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The Jasper Lake processor is also a Tremont microarchitecture. From the
perspective of perf MSR, there is nothing changed compared with
Elkhart Lake.
Share the code path with Elkhart Lake.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1601296242-32763-2-git-send-email-kan.liang@linux.intel.com

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Kan Liang 2020-09-28 05:30:42 -07:00 • committed by Peter Zijlstra

parent dbfd638889

commit c3bb8a9fa3

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arch/x86/events/msr.c

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