ALSA: hda - restore BCLK M/N value as per CDCLK for HSW/BDW display HDA controller

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commit e4d9e513de upstream.

For HSW/BDW display HD-A controller, hda_set_bclk() is defined to set BCLK
by programming the M/N values as per the core display clock (CDCLK) queried from
i915 display driver.

And the audio driver will also set BCLK in azx_first_init() since the display
driver can turn off the shared power in boot phase if only eDP is connected
and M/N values will be lost and must be reprogrammed.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

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Mengdong Lin 2014-07-03 17:02:23 +08:00 • committed by Greg Kroah-Hartman

parent 8143820319

commit c3bdaf3d46

3 changed files with 66 additions and 41 deletions

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55

sound/pci/hda/hda_i915.c

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2

sound/pci/hda/hda_i915.h

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50

sound/pci/hda/hda_intel.c

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