net/mlx5: Add IFC bits needed for single FDB mode

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Currently we operate in a mode where each eswitch manager has a separate
FDB. In order to combine these multiple FDBs we expose new caps to allow
this:

- Set root flow table which isn't native.
- Set FDB a different selection mode when in LAG mode.

Signed-off-by: Mark Bloch <mbloch@nvidia.com>
Reviewed-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

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Mark Bloch 2021-03-10 23:09:14 -08:00 • committed by Saeed Mahameed

parent 3a46f4fb55

commit c3e666f1ad

1 changed files with 15 additions and 6 deletions

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include/linux/mlx5/mlx5_ifc.h

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