arm64: zynqmp: Label whole PL part as fpga_full region

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This will simplify dt overlay structure for the whole PL.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>

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Nava kishore Manne 2019-10-18 18:07:33 +02:00 • committed by Michal Simek

parent 9c36339215

commit c40d1cceb3

1 changed files with 8 additions and 0 deletions

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arch/arm64/boot/dts/xilinx/zynqmp.dtsi

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