drm/i915/mtl: memory latency data from LATENCY_LPX_LPY for WM

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Since Xe LPD+, Memory latency data are in LATENCY_LPX_LPY registers
instead of GT driver mailbox.

v2: Use the extracted wm latency adjustment function(Matt)
v3: Use Odd/even for Latency fields(MattR)

Bspec: 64608

Cc: Matt Roper <matthew.d.roper@intel.com>
Original Author: Caz Yokoyama
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/<20220818234202.451742-15-radhakrishna.sripada@intel.com>

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This commit is contained in:

Radhakrishna Sripada 2022-08-18 16:41:55 -07:00

parent a2b4cefafa

commit c41aa0204d

2 changed files with 23 additions and 3 deletions

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6

drivers/gpu/drm/i915/i915_reg.h

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20

drivers/gpu/drm/i915/intel_pm.c

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