drm/i915: Optimize pipe irq handling on bdw

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We have a per-pipe bit in the master irq control register, so use it.
This allows us to drop the masks for aggregate interrupt bits and be a
bit more explicit in the code. It also removes one indentation level.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Daniel Vetter 2013-11-07 11:05:40 +01:00

parent 40c499f93f

commit c42664cceb

2 changed files with 20 additions and 25 deletions

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40

drivers/gpu/drm/i915/i915_irq.c

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5

drivers/gpu/drm/i915/i915_reg.h

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