pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf

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The offset of gpio0 and gpio1 bank drive strength is 0x8, not 0x4.
But the mux is 0x4, we couldn't use the IOMUX_WIDTH_4BIT flag, so
we give them actual offset.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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David Wu 2017-09-30 20:13:20 +08:00 • committed by Linus Walleij

parent 2dca9227d3

commit c437f65c42

1 changed files with 6 additions and 6 deletions

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drivers/pinctrl/pinctrl-rockchip.c

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