perf vendor events riscv: add Sifive U74 JSON file

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This patch add the Sifive U74 JSON file.

Link: https://sifive.cdn.prismic.io/sifive/ad5577a0-9a00-45c9-a5d0-424a3d586060_u74_core_complex_manual_21G3.pdf
Derived-from-code-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Tested-by: Kautuk Consul <kconsul@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Anup Patel <anup@brainfault.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: linux-riscv@lists.infradead.org
Cc: linux@yadro.com
Link: https://lore.kernel.org/r/20220815132251.25702-4-nikita.shubin@maquefel.me
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

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This commit is contained in:

Nikita Shubin 2022-08-15 16:22:40 +03:00 • committed by Arnaldo Carvalho de Melo

parent 8f0dcb4e73

commit c4f769d409

5 changed files with 266 additions and 0 deletions

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17

tools/perf/pmu-events/arch/riscv/mapfile.csv

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1 # Format: 2 # MVENDORID-MARCHID-MIMPID,Version,JSON/file/pathname,Type 3 # 4 # where 5 # MVENDORID JEDEC code of the core provider 6 # MARCHID base microarchitecture of the hart 7 # MIMPID unique encoding of the version 8 # of the processor implementation 9 # Version could be used to track version of JSON file 10 # but currently unused. 11 # JSON/file/pathname is the path to JSON file, relative 12 # to tools/perf/pmu-events/arch/riscv/. 13 # Type is core, uncore etc 14 # 15 # 16 #MVENDORID-MARCHID-MIMPID,Version,Filename,EventType 17 0x489-0x8000000000000007-0x[[:xdigit:]]+,v1,sifive/u74,core

68

tools/perf/pmu-events/arch/riscv/sifive/u74/firmware.json

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92

tools/perf/pmu-events/arch/riscv/sifive/u74/instructions.json

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32

tools/perf/pmu-events/arch/riscv/sifive/u74/memory.json

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57

tools/perf/pmu-events/arch/riscv/sifive/u74/microarch.json

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