drm/amd/pm: optimize the link width/speed retrieving V2

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By using the information provided by PMFW when available.

V2: put those structures shared around SMU V11 ASICs in
    smu_v11_0.h

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

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Evan Quan 2021-02-20 11:58:51 +08:00 • committed by Alex Deucher

parent 7d6c13ef46

commit c524c1c9a7

4 changed files with 30 additions and 22 deletions

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10

drivers/gpu/drm/amd/pm/inc/smu_v11_0.h

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12

drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c

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20

drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c

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10

drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c

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