drm/xe/guc: Add Wa_14025883347 for GuC DMA failure on reset

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Prevent GuC firmware DMA failures during GuC-only reset by disabling
idle flow and verifying SRAM handling completion. Without this, reset
can be issued while SRAM handler is copying WOPCM to SRAM,
causing GuC HW to get stuck.

v2: Modify error message (Badal)
    Rename reg bit name (Daniele)
    Update WA skip condition (Daniele)
    Update SRAM handling logic (Daniele)
v3: Reorder WA call (Badal)
    Wait for GuC ready status (Daniele)
v4: Update reg name (Badal)
    Add comment (Daniele)
    Add extended graphics version (Daniele)
    Modify rules

Signed-off-by: Sk Anirban <sk.anirban@intel.com>
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com>
Acked-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patch.msgid.link/20260202105313.3338094-4-sk.anirban@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

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This commit is contained in:

Sk Anirban 2026-02-02 16:23:15 +05:30 • committed by Matt Roper

parent dc90ead440

commit c57db41b8d

3 changed files with 49 additions and 0 deletions

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8

drivers/gpu/drm/xe/regs/xe_guc_regs.h

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38

drivers/gpu/drm/xe/xe_guc.c

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3

drivers/gpu/drm/xe/xe_wa_oob.rules

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