riscv: dts: spacemit: define a SPI controller node

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Define a node for the fourth SoC SPI controller (number 3) on the
SpacemiT K1 SoC.

Enable it on the Banana Pi BPI-F3 board, which exposes this feature
via its GPIO block:
  GPIO PIN 19:  MOSI
  GPIO PIN 21:  MISO
  GPIO PIN 23:  SCLK
  GPIO PIN 24:  SS (inverted)

Define pincontrol configurations for the pins as used on that board.

(This was tested using a GigaDevice GD25Q64E SPI NOR chip.)

Reviewed-by: Yixun Lan <dlan@gentoo.org>
Signed-off-by: Alex Elder <elder@riscstar.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20260502-spi-spacemit-k1-v10-3-f412e1ae8a34@riscstar.com
Signed-off-by: Yixun Lan <dlan@kernel.org>

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This commit is contained in:

Alex Elder 2026-05-02 21:30:53 -04:00 • committed by Yixun Lan

parent 24c12ca43b

commit c580774185

3 changed files with 42 additions and 0 deletions

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7

arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts

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arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi

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arch/riscv/boot/dts/spacemit/k1.dtsi

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