drm/amd/display: resolve correct MALL size for dcn401

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[WHY]
Code for dcn401 to calculate available MALL size for display was shared
with dcn32 and did not provide the correct result for all ASICs.

[HOW]
Add dcn401 specific function to properly calculate the available MALL
for display.

Reviewed-by: Chris Park <chris.park@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Dillon Varone 2024-09-25 20:18:07 -04:00 • committed by Alex Deucher

parent 668d6808e9

commit c5a332f98d

2 changed files with 28 additions and 3 deletions

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4

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

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27

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

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