From c62fd9b8c2ac73ec4404a44473ab252770945e61 Mon Sep 17 00:00:00 2001 From: Matt Roper Date: Wed, 23 Sep 2026 16:10:09 -0700 Subject: [PATCH] drm/xe: Drop old Xe GT ID macros XE_GT0 and XE_GT1 are old macros that were used for hardcoding specific GTs during early development of the driver; neither should be anymore since the driver shouldn't be making assumptions about what ID numbers correspond to specific types of IDs. * XE_GT0 was only being used in the GuC init code to skip reading the hwconfig table on more than one GT. Comparing the GT against xe_root_mmio_gt(xe) is a more direct way to ensure this happens on just a single GT per device (and should work even if the ID numbers wind up changing in the future). * XE_GT1 was only being used to set XE_MAX_TILES_PER_DEVICE which makes no sense at all; even though the highest tile count we have on any device today (2 on PVC) happens to match the number of GTs that we can potentially have inside a tile (2: primary+media on non-PVC platforms), these counts are unrelated and should not be tied together like this. Cleanup the places where these were used and drop the two defines so that they don't get mis-used anywhere else going forward. Reviewed-by: Dnyaneshwar Bhadane Link: https://patch.msgid.link/20260923-drop_old_gt_defines-v1-1-8f0811238582@intel.com Signed-off-by: Matt Roper --- drivers/gpu/drm/xe/xe_device_types.h | 4 +--- drivers/gpu/drm/xe/xe_guc_hwconfig.c | 2 +- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h index 4661bfce2f4e..55a6756c77de 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -89,9 +89,7 @@ enum xe_page_size_alloc_ctrl_mode { #define XE_VRAM_FLAGS_NEED64K BIT(0) -#define XE_GT0 0 -#define XE_GT1 1 -#define XE_MAX_TILES_PER_DEVICE (XE_GT1 + 1) +#define XE_MAX_TILES_PER_DEVICE 2 /* * Highest GT/tile count for any platform. Used only for memory allocation diff --git a/drivers/gpu/drm/xe/xe_guc_hwconfig.c b/drivers/gpu/drm/xe/xe_guc_hwconfig.c index b300901dbb8e..dc667a71b438 100644 --- a/drivers/gpu/drm/xe/xe_guc_hwconfig.c +++ b/drivers/gpu/drm/xe/xe_guc_hwconfig.c @@ -65,7 +65,7 @@ int xe_guc_hwconfig_init(struct xe_guc *guc) /* * All hwconfig the same across GTs so only GT0 needs to be configured */ - if (gt->info.id != XE_GT0) + if (gt != xe_root_mmio_gt(xe)) return 0; /* ADL_P, DG2+ supports hwconfig table */