staging/vc04_services: Use correct cache line size

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Use the compatible string in the DTB to select the correct cache line
size for the SoC - 32 for BCM2835, and 64 for BCM2836 and BCM2837.

Signed-off-by: Phil Elwell <phil@raspberrypi.org>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Phil Elwell 2018-09-17 09:22:21 +01:00 • committed by Greg Kroah-Hartman

parent a779df303b

commit c683db8860

3 changed files with 33 additions and 11 deletions

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4

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c

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35

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c

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5

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.h

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