IB/mlx5: Change TX affinity assignment in RoCE LAG mode

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In the current code, the TX affinity is per RoCE device, which can cause
unfairness between different contexts. e.g. if we open two contexts, and
each open 10 QPs concurrently, all of the QPs of the first context might
end up on the first port instead of distributed on the two ports as
expected

To overcome this unfairness between processes, we maintain per device TX
affinity, and per process TX affinity.

The allocation algorithm is as follow:

1. Hold two tx_port_affinity atomic variables, one per RoCE device and one
   per ucontext. Both initialized to 0.

2. In mlx5_ib_alloc_ucontext do:
 2.1. ucontext.tx_port_affinity = device.tx_port_affinity
 2.2. device.tx_port_affinity += 1

3. In modify QP INIT2RST:
 3.1. qp.tx_port_affinity = ucontext.tx_port_affinity % MLX5_PORT_NUM
 3.2. ucontext.tx_port_affinity += 1

Signed-off-by: Majd Dibbiny <majd@mellanox.com>
Reviewed-by: Moni Shoua <monis@mellanox.com>
Signed-off-by: Leon Romanovsky <leonro@mellanox.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>

...

This commit is contained in:

Majd Dibbiny 2018-08-28 14:29:05 +03:00 • committed by Jason Gunthorpe

parent dc9f5d0f84

commit c6a21c3864

3 changed files with 44 additions and 5 deletions

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8

drivers/infiniband/hw/mlx5/main.c

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4

drivers/infiniband/hw/mlx5/mlx5_ib.h

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37

drivers/infiniband/hw/mlx5/qp.c

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