ASoC: rt711-sdca: fix the latency time of clock stop prepare state machine transitions

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Due to the hardware behavior, it takes some time for CBJ detection/impedance sensing/de-bounce.
The ClockStop_NotFinished flag will be raised until these functions are completed.
In ClockStopMode0 mode case, the SdW controller might check this flag from D3 to D0 when the
jack detection interrupt happened.

Signed-off-by: Shuming Fan <shumingf@realtek.com>
Link: https://lore.kernel.org/r/20221116090318.5017-1-shumingf@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Shuming Fan 2022-11-16 17:03:18 +08:00 • committed by Mark Brown

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sound/soc/codecs/rt711-sdca-sdw.c

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