arm64: dts: qcom: x1e80100: Add QUP power domains and OPPs

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Add the power domains and OPP tables to all the QUP-related UART/I2C/SPI
nodes to ensure that we vote for the necessary performance states. Similar
to sm8350.dtsi, the OPPs depend on the QUP instance. The first two
instances in each geniqup group need &rpmhpd_opp_svs starting at 120MHz,
the others already starting at 100MHz. I2C always runs at a lower clock
frequency and therefore uses a fixed vote.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20241007-x1e80100-pwrseq-qcp-v1-1-f7166510ab17@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Stephan Gerhold 2024-10-07 20:22:25 +02:00 • committed by Bjorn Andersson

parent 09cd0cb290

commit c8327bb53b

1 changed files with 178 additions and 0 deletions

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arch/arm64/boot/dts/qcom/x1e80100.dtsi

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