MIPS: Emulate the BC1{EQ,NE}Z FPU instructions

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MIPS R6 introduced the following two branch instructions for COP1:

BC1EQZ: Branch if Cop1 (FPR) Register Bit 0 is Equal to Zero
BC1NEZ: Branch if Cop1 (FPR) Register Bit 0 is Not Equal to Zero

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>

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Markos Chandras 2014-11-26 10:10:18 +00:00

parent 319824eabc

commit c8a34581ec

3 changed files with 101 additions and 30 deletions

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3

arch/mips/include/uapi/asm/inst.h

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101

arch/mips/kernel/branch.c

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27

arch/mips/math-emu/cp1emu.c

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