ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5

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Since SYSRAM set the L2 cache latency on EXYNOS5 SoCs,
no longer need that in the kernel. It helps to reduce
booting time (no need cache disable and cache enable).

Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

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Boojin Kim 2012-06-27 09:45:42 +09:00 • committed by Kukjin Kim

parent 65ab16fd38

commit c8dd5110de

1 changed files with 0 additions and 25 deletions

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arch/arm/mach-exynos/common.c

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