drm/i915: Program VLV/CHV PIPE_MSA_MISC register

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VLV/CHV have an extra register to configure some stereo3d
signalling details via DP MSA. Make sure we reset that
register to zero (since we don't do any stereo3d stuff).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230314130255.23273-5-ville.syrjala@linux.intel.com
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

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Ville Syrjälä 2023-03-14 15:02:50 +02:00

parent 6e889b1ce7

commit c931ef0041

2 changed files with 8 additions and 0 deletions

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2

drivers/gpu/drm/i915/display/intel_display.c

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6

drivers/gpu/drm/i915/i915_reg.h

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