drm/amd/include: add bitfield define for EDC registers

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Add EDC registers to support VEGA20 RAS

Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Dennis Li 2019-07-19 14:42:49 +08:00 • committed by Alex Deucher

parent 7cdc2ee300

commit ca3f422f53

1 changed files with 157 additions and 0 deletions

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

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