drm/xe/migrate: Cap PTEs written by MI_STORE_DATA_IMM to 510

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Although MI_STORE_DATA_IMM's "length" field is 10-bits, 0x3FE is
considered the largest legal value accepted.  Since that instruction
field is always encoded in (val-2) format, this translates to 0x400
dwords for the true maximum length of the instruction.  Subtracting the
instruction header (1 dword) and address (2 dwords), that leaves 0x3FD
dwords (i.e., 0x1FE qwords) for PTE values.

Bspec: 60246, 45753
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20240111220238.1467572-2-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

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Matt Roper 2024-01-11 14:02:38 -08:00

parent 1113e52ffe

commit ca630876aa

1 changed files with 14 additions and 5 deletions

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drivers/gpu/drm/xe/xe_migrate.c

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