From 97aeb6507356c72d87fd93f45705d3f4b1a05d14 Mon Sep 17 00:00:00 2001 From: Nick Chan Date: Mon, 17 Feb 2025 14:10:05 +0800 Subject: [PATCH 1/7] arm64: dts: apple: t7000: Add missing CPU p-state 7 for J96 and J97 Add missing CPU p-state 7 @ 1512 MHz for iPad mini 4. Fixes: e97323994f4a ("arm64: dts: apple: t7000: Add cpufreq nodes") Signed-off-by: Nick Chan Link: https://lore.kernel.org/r/20250217-mini4-cpufreq-v1-1-8974e90dd806@gmail.com Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t7000-mini4.dtsi | 4 ++++ arch/arm64/boot/dts/apple/t7000.dtsi | 6 ++++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi index 6da15d15601b..cc235c5a0c43 100644 --- a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi +++ b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi @@ -57,3 +57,7 @@ &typhoon_opp06 { status = "okay"; }; + +&typhoon_opp07 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi index d4b479ccfe8c..32cac8c30e62 100644 --- a/arch/arm64/boot/dts/apple/t7000.dtsi +++ b/arch/arm64/boot/dts/apple/t7000.dtsi @@ -84,6 +84,12 @@ clock-latency-ns = <42000>; status = "disabled"; /* Not available on N102 */ }; + typhoon_opp07: opp07 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <7>; + clock-latency-ns = <49000>; + status = "disabled"; /* J96 and J97 only */ + }; }; soc { From 1f7af2931158a5e819ac71bcba91e961ac5ca3ea Mon Sep 17 00:00:00 2001 From: Hector Martin Date: Tue, 3 Dec 2024 08:57:57 +0100 Subject: [PATCH 2/7] arm64: dts: apple: t8103: Fix spi4 power domain sort order Signed-off-by: Hector Martin Reviewed-by: Neal Gompa Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-1-cd68bfaf0c84@jannau.net Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8103-pmgr.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi b/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi index 9645861a858c..c41c57d63997 100644 --- a/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi +++ b/arch/arm64/boot/dts/apple/t8103-pmgr.dtsi @@ -387,6 +387,15 @@ power-domains = <&ps_sio>, <&ps_spi_p>; }; + ps_spi4: power-controller@260 { + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; + reg = <0x260 4>; + #power-domain-cells = <0>; + #reset-cells = <0>; + label = "spi4"; + power-domains = <&ps_sio>, <&ps_spi_p>; + }; + ps_uart_n: power-controller@268 { compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; reg = <0x268 4>; @@ -558,15 +567,6 @@ apple,always-on; /* Memory controller */ }; - ps_spi4: power-controller@260 { - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; - reg = <0x260 4>; - #power-domain-cells = <0>; - #reset-cells = <0>; - label = "spi4"; - power-domains = <&ps_sio>, <&ps_spi_p>; - }; - ps_dcs0: power-controller@300 { compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate"; reg = <0x300 4>; From 556cd4bbb45bb5a73042c02b7e5c982112a6ed1f Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Tue, 3 Dec 2024 08:57:58 +0100 Subject: [PATCH 3/7] arm64: dts: apple: t8103: Add spi controller nodes Apple silicon devices have one or more SPI devices. Add device tree nodes for all known controllers. The missing ones could be guessed and tested with a little effort but since the devices expose no pins and no new devices are expected there is no point in spending the effort. SPI is used for spi-nor and input devices like keyboard, trackpad, touchscreen and fingerprint reader. Only the spi-nor flash has upstream drivers. Support for it will be added in a following commit. Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-2-cd68bfaf0c84@jannau.net Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8103.dtsi | 76 ++++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index 9b0dad6b6184..c9b789a2ff7e 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -326,6 +326,20 @@ clock-output-names = "clkref"; }; + clk_120m: clock-120m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <120000000>; + clock-output-names = "clk_120m"; + }; + + clk_200m: clock-200m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "clk_200m"; + }; + /* * This is a fabulated representation of the input clock * to NCO since we don't know the true clock tree. @@ -441,6 +455,48 @@ status = "disabled"; }; + spi0: spi@235100000 { + compatible = "apple,t8103-spi", "apple,spi"; + reg = <0x2 0x35100000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + clocks = <&clk_200m>; + pinctrl-0 = <&spi0_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi1: spi@235104000 { + compatible = "apple,t8103-spi", "apple,spi"; + reg = <0x2 0x35104000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + clocks = <&clk_200m>; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@23510c000 { + compatible = "apple,t8103-spi", "apple,spi"; + reg = <0x2 0x3510c000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + clocks = <&clk_120m>; + pinctrl-0 = <&spi3_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + serial0: serial@235200000 { compatible = "apple,s5l-uart"; reg = <0x2 0x35200000 0x0 0x1000>; @@ -597,6 +653,26 @@ ; }; + spi0_pins: spi0-pins { + pinmux = , /* CLK */ + , /* MOSI */ + ; /* MISO */ + }; + + spi1_pins: spi1-pins { + pinmux = , + , + , + ; + }; + + spi3_pins: spi3-pins { + pinmux = , + , + , + ; + }; + pcie_pins: pcie-pins { pinmux = , , From 0a6d561c7e46bf46b886af209e8ebedb6d500680 Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Tue, 3 Dec 2024 08:57:59 +0100 Subject: [PATCH 4/7] arm64: dts: apple: t8112: Add spi controller nodes Apple silicon devices have one or more SPI devices. Add device tree nodes for all known controllers. The missing ones could be guessed and tested with a little effort but since the devices expose no pins and no new devices are expected there is no point in spending the effort. SPI is used for spi-nor and input devices like keyboard, trackpad, touchscreen and fingerprint reader. Only the spi-nor flash has upstream drivers. Support for it will be added in a following commit. Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-3-cd68bfaf0c84@jannau.net Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8112.dtsi | 44 +++++++++++++++++++++++++++- 1 file changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi index 1666e6ab250b..58d88f1ef92a 100644 --- a/arch/arm64/boot/dts/apple/t8112.dtsi +++ b/arch/arm64/boot/dts/apple/t8112.dtsi @@ -349,6 +349,13 @@ clock-output-names = "clkref"; }; + clk_200m: clock-200m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "clk_200m"; + }; + /* * This is a fabulated representation of the input clock * to NCO since we don't know the true clock tree. @@ -467,6 +474,34 @@ status = "disabled"; }; + spi1: spi@235104000 { + compatible = "apple,t8112-spi", "apple,spi"; + reg = <0x2 0x35104000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + clocks = <&clk_200m>; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@23510c000 { + compatible = "apple,t8112-spi", "apple,spi"; + reg = <0x2 0x3510c000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + clocks = <&clkref>; + pinctrl-0 = <&spi3_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + serial0: serial@235200000 { compatible = "apple,s5l-uart"; reg = <0x2 0x35200000 0x0 0x1000>; @@ -626,13 +661,20 @@ ; }; - spi3_pins: spi3-pins { + spi1_pins: spi1-pins { pinmux = , , , ; }; + spi3_pins: spi3-pins { + pinmux = , + , + , + ; + }; + pcie_pins: pcie-pins { pinmux = , , From d08e455a865c99a8050addf4dc001bcfdf1b7b8b Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Tue, 3 Dec 2024 08:58:00 +0100 Subject: [PATCH 5/7] arm64: dts: apple: t600x: Add spi controller nodes Apple silicon devices have one or more SPI devices. Add device tree nodes for all known controllers. The missing ones could be guessed and tested with a little effort but since the devices expose no pins and no new devices are expected there is no point in spending the effort. SPI is used for spi-nor and input devices like keyboard, trackpad, touchscreen and fingerprint reader. Only the spi-nor flash has upstream drivers. Support for it will be added in a following commit. Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-4-cd68bfaf0c84@jannau.net Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t600x-common.dtsi | 7 +++++ arch/arm64/boot/dts/apple/t600x-die0.dtsi | 28 +++++++++++++++++++ .../arm64/boot/dts/apple/t600x-gpio-pins.dtsi | 14 ++++++++++ 3 files changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t600x-common.dtsi b/arch/arm64/boot/dts/apple/t600x-common.dtsi index fa8ead699363..87dfc13d7417 100644 --- a/arch/arm64/boot/dts/apple/t600x-common.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-common.dtsi @@ -362,6 +362,13 @@ clock-output-names = "clkref"; }; + clk_200m: clock-200m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "clk_200m"; + }; + /* * This is a fabulated representation of the input clock * to NCO since we don't know the true clock tree. diff --git a/arch/arm64/boot/dts/apple/t600x-die0.dtsi b/arch/arm64/boot/dts/apple/t600x-die0.dtsi index b1c875e692c8..e9b3140ba1a9 100644 --- a/arch/arm64/boot/dts/apple/t600x-die0.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-die0.dtsi @@ -163,6 +163,34 @@ status = "disabled"; }; + spi1: spi@39b104000 { + compatible = "apple,t6000-spi", "apple,spi"; + reg = <0x3 0x9b104000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_200m>; + pinctrl-0 = <&spi1_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi1>; + status = "disabled"; + }; + + spi3: spi@39b10c000 { + compatible = "apple,t6000-spi", "apple,spi"; + reg = <0x3 0x9b10c000 0x0 0x4000>; + interrupt-parent = <&aic>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkref>; + pinctrl-0 = <&spi3_pins>; + pinctrl-names = "default"; + power-domains = <&ps_spi3>; + status = "disabled"; + }; + serial0: serial@39b200000 { compatible = "apple,s5l-uart"; reg = <0x3 0x9b200000 0x0 0x1000>; diff --git a/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi b/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi index b31f1a7a2b3f..1a994c3c1b79 100644 --- a/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi @@ -36,6 +36,20 @@ ; }; + spi1_pins: spi1-pins { + pinmux = , + , + , + ; + }; + + spi3_pins: spi3-pins { + pinmux = , + , + , + ; + }; + pcie_pins: pcie-pins { pinmux = , , From 3febe9de5ca5267618675650871a626d0901f8cb Mon Sep 17 00:00:00 2001 From: Janne Grunau Date: Tue, 3 Dec 2024 08:58:01 +0100 Subject: [PATCH 6/7] arm64: dts: apple: Add SPI NOR nvram partition to all devices All known M1* and M2* devices use an identical SPI NOR flash configuration with a partition containing a non-volatile key:value storage. Use a .dtsi and include it for every device. The nvram partition parameters itself depend on the version of the installed Apple iboot boot loader. m1n1 will fill in the current values provided by Apple's iboot. Reviewed-by: Neal Gompa Signed-off-by: Janne Grunau Link: https://lore.kernel.org/r/20241203-asahi-spi-dt-v2-5-cd68bfaf0c84@jannau.net Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/spi1-nvram.dtsi | 39 +++++++++++++++++++ .../arm64/boot/dts/apple/t600x-j314-j316.dtsi | 2 + arch/arm64/boot/dts/apple/t600x-j375.dtsi | 2 + arch/arm64/boot/dts/apple/t8103-jxxx.dtsi | 2 + arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 2 + 5 files changed, 47 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/spi1-nvram.dtsi diff --git a/arch/arm64/boot/dts/apple/spi1-nvram.dtsi b/arch/arm64/boot/dts/apple/spi1-nvram.dtsi new file mode 100644 index 000000000000..3df2fd3993b5 --- /dev/null +++ b/arch/arm64/boot/dts/apple/spi1-nvram.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +// +// Devicetree include for common spi-nor nvram flash. +// +// Apple uses a consistent configiguration for the nvram on all known M1* and +// M2* devices. +// +// Copyright The Asahi Linux Contributors + +/ { + aliases { + nvram = &nvram; + }; +}; + +&spi1 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <25000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + nvram: partition@700000 { + label = "nvram"; + /* To be filled by the loader */ + reg = <0x0 0x0>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi b/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi index 2e471dfe43cf..22ebc78e120b 100644 --- a/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi @@ -119,3 +119,5 @@ &fpwm0 { status = "okay"; }; + +#include "spi1-nvram.dtsi" diff --git a/arch/arm64/boot/dts/apple/t600x-j375.dtsi b/arch/arm64/boot/dts/apple/t600x-j375.dtsi index 1e5a19e49b08..d5b985ad5679 100644 --- a/arch/arm64/boot/dts/apple/t600x-j375.dtsi +++ b/arch/arm64/boot/dts/apple/t600x-j375.dtsi @@ -126,3 +126,5 @@ &pcie0_dart_3 { status = "okay"; }; + +#include "spi1-nvram.dtsi" diff --git a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi index 5988a4eb6efa..8e82231acab5 100644 --- a/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8103-jxxx.dtsi @@ -90,3 +90,5 @@ &nco_clkref { clock-frequency = <900000000>; }; + +#include "spi1-nvram.dtsi" diff --git a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi index f5edf61113e7..6da35496a4c8 100644 --- a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi @@ -79,3 +79,5 @@ &nco_clkref { clock-frequency = <900000000>; }; + +#include "spi1-nvram.dtsi" From 44db68dee1f77260d7037319e911e9883a6ffe0e Mon Sep 17 00:00:00 2001 From: Sasha Finkelstein Date: Tue, 25 Feb 2025 22:19:54 +0100 Subject: [PATCH 7/7] arm64: dts: apple: Add touchbar digitizer nodes Adds device tree entries for the touchbar digitizer Co-developed-by: Janne Grunau Signed-off-by: Janne Grunau Reviewed-by: Neal Gompa Acked-by: Sven Peter Signed-off-by: Sasha Finkelstein Link: https://lore.kernel.org/r/20250225-z2-dts-v1-1-df101a7c17c8@gmail.com Signed-off-by: Sven Peter --- arch/arm64/boot/dts/apple/t8103-j293.dts | 27 ++++++++++++++++++++++++ arch/arm64/boot/dts/apple/t8112-j493.dts | 23 ++++++++++++++++++++ arch/arm64/boot/dts/apple/t8112.dtsi | 2 +- 3 files changed, 51 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/apple/t8103-j293.dts b/arch/arm64/boot/dts/apple/t8103-j293.dts index 56b0c67bfcda..0a93d3891c23 100644 --- a/arch/arm64/boot/dts/apple/t8103-j293.dts +++ b/arch/arm64/boot/dts/apple/t8103-j293.dts @@ -17,6 +17,14 @@ compatible = "apple,j293", "apple,t8103", "apple,arm-platform"; model = "Apple MacBook Pro (13-inch, M1, 2020)"; + /* + * All of those are used by the bootloader to pass calibration + * blobs and other device-specific properties + */ + aliases { + touchbar0 = &touchbar0; + }; + led-controller { compatible = "pwm-leds"; led-0 { @@ -49,3 +57,22 @@ &fpwm1 { status = "okay"; }; + +&spi0 { + cs-gpios = <&pinctrl_ap 109 GPIO_ACTIVE_LOW>; + status = "okay"; + + touchbar0: touchbar@0 { + compatible = "apple,j293-touchbar"; + reg = <0>; + spi-max-frequency = <11500000>; + spi-cs-setup-delay-ns = <2000>; + spi-cs-hold-delay-ns = <2000>; + reset-gpios = <&pinctrl_ap 139 GPIO_ACTIVE_LOW>; + interrupts-extended = <&pinctrl_ap 194 IRQ_TYPE_EDGE_FALLING>; + firmware-name = "apple/dfrmtfw-j293.bin"; + touchscreen-size-x = <23045>; + touchscreen-size-y = <640>; + touchscreen-inverted-y; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8112-j493.dts b/arch/arm64/boot/dts/apple/t8112-j493.dts index 0ad908349f55..045bd0716cb7 100644 --- a/arch/arm64/boot/dts/apple/t8112-j493.dts +++ b/arch/arm64/boot/dts/apple/t8112-j493.dts @@ -17,8 +17,13 @@ compatible = "apple,j493", "apple,t8112", "apple,arm-platform"; model = "Apple MacBook Pro (13-inch, M2, 2022)"; + /* + * All of those are used by the bootloader to pass calibration + * blobs and other device-specific properties + */ aliases { bluetooth0 = &bluetooth0; + touchbar0 = &touchbar0; wifi0 = &wifi0; }; @@ -67,3 +72,21 @@ &fpwm1 { status = "okay"; }; + +&spi3 { + status = "okay"; + + touchbar0: touchbar@0 { + compatible = "apple,j493-touchbar"; + reg = <0>; + spi-max-frequency = <8000000>; + spi-cs-setup-delay-ns = <2000>; + spi-cs-hold-delay-ns = <2000>; + reset-gpios = <&pinctrl_ap 170 GPIO_ACTIVE_LOW>; + interrupts-extended = <&pinctrl_ap 174 IRQ_TYPE_EDGE_FALLING>; + firmware-name = "apple/dfrmtfw-j493.bin"; + touchscreen-size-x = <23045>; + touchscreen-size-y = <640>; + touchscreen-inverted-y; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/apple/t8112.dtsi index 58d88f1ef92a..271986a7697f 100644 --- a/arch/arm64/boot/dts/apple/t8112.dtsi +++ b/arch/arm64/boot/dts/apple/t8112.dtsi @@ -499,7 +499,7 @@ power-domains = <&ps_spi3>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disabled"; /* only used in J493 */ }; serial0: serial@235200000 {