arm64: dts: ti: k3-j784s4-j742s2-evm-common: Add bootph-all tag to SERDES0

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J784S4 SoC has two instances of PCIe which are PCIe0 and PCIe1. PCIe1
instance is used for PCIe boot process. J784S4 SoC has four instances
of 4-lane SERDES. Out of which SERDES0 is used as PHY for PCIe1. So it
needs to be functional at all stages of PCIe boot process. Thus add the
"bootph-all" boot phase tag to nodes required to enable SERDES0 at all
boot stages.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Link: https://patch.msgid.link/20251017084654.2929945-3-h-salunke@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

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Hrushikesh Salunke 2025-10-17 14:16:53 +05:30 • committed by Vignesh Raghavendra

parent 1f03b9e71e

commit cadd9234ae

1 changed files with 6 additions and 0 deletions

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arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi

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