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arm64: dts: imx8m: add cache info

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i.MX8M Family use A53 Cores and has 32KB ICache with 32KB DCache.
 - Icache is 2-way set associative
 - Dcache is 4-way set associative
 - L2cache is 16-way set associative
 - Line size are 64bytes

Except i.MX8MQ has 1MB L2 Cache, others has 512KB L2 Cache.

So add the cache info in device tree and let use could see that
from /sys/devices/system/cpu/cpu[x]/cache/

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Peng Fan 2021-11-12 14:26:02 +08:00 • committed by Shawn Guo
commit cb551b5e3b
4 changed files with 112 additions and 0 deletions
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