clk: mediatek: Fix corner case of tuner_en_reg

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On MT8195, tuner_en_reg is moved to register offest 0x0.
If we only judge by tuner_en_reg, it may lead to wrong address.
Add tuner_en_bit to the check condition. And it has been confirmed,
on all the MediaTek SoCs, bit0 of offset 0x0 is always occupied by
clock square control.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210914021633.26377-4-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Chun-Jie Chen 2021-09-14 10:16:12 +08:00 • committed by Stephen Boyd

parent 01404648df

commit cb95c169e9

1 changed files with 1 additions and 1 deletions

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drivers/clk/mediatek/clk-pll.c

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