drm/amd/display: Ammend DCPG IP control sequences to align with HW guidance

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[WHY&HOW]
IP_REQUEST_CNTL should only be toggled off when it was originally, never
unconditionally.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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This commit is contained in:

Dillon Varone 2025-01-14 12:14:26 -05:00 • committed by Alex Deucher

parent c31b41f1cb

commit cbd97d621e

4 changed files with 48 additions and 5 deletions

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14

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

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34

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c

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3

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.h

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2

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c

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