PCI: Mark Nvidia GB10 to avoid bus reset

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[ Upstream commit c81a2ce6b6 ]

After asserting Secondary Bus Reset to downstream devices via a GB10 Root
Port, the link may not retrain correctly, e.g., the link may retrain with a
lower lane count or config accesses to downstream devices may fail.

Prevent use of Secondary Bus Reset for devices below GB10.

Signed-off-by: Johnny-CC Chang <Johnny-CC.Chang@mediatek.com>
[bhelgaas: drop pci_ids.h update (only used once), update commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://patch.msgid.link/20251113084441.2124737-1-Johnny-CC.Chang@mediatek.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Johnny-CC Chang 2025-11-13 16:44:06 +08:00 • committed by Sasha Levin

parent 7e9a642282

commit cbda385589

1 changed files with 8 additions and 0 deletions

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drivers/pci/quirks.c

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