tg3: Allow DMAs to cross cacheline boundaries

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By default, the 5717 (and future chips) break up PCIe DMA packets across
cacheline boundaries.  This isn't necessary on x86.  This patch
selectively loosens the restriction.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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Matt Carlson 2009-11-13 13:03:40 +00:00 • committed by David S. Miller

parent 615774fe59

commit cbf9ca6cf8

2 changed files with 16 additions and 7 deletions

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20

drivers/net/tg3.c

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3

drivers/net/tg3.h

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