drm/i915: Add Wa_1409120013:icl,ehl

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This chicken bit should be set before enabling FBC to avoid screen
corruption when the plane size has odd vertical and horizontal
dimensions.  It is safe to leave the bit set even when FBC is disabled.

v2:
 - The bspec's name for this bit on these platforms ("Spare 14") is
   pretty meaningless.  Let's rename the bit definition to something
   that more accurately reflects what the bit really does.  (Clint)

v3:
 - The chicken register was already defined (along with a few other
   gen9-specific bits) farther down.  Just add the new bit definition
   there.  (Clint)

Cc: Clinton Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190612183631.30540-1-matthew.d.roper@intel.com
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>

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This commit is contained in:

Matt Roper 2019-06-12 11:36:31 -07:00

parent 84383d2e8d

commit cc49abc246

2 changed files with 5 additions and 0 deletions

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1

drivers/gpu/drm/i915/i915_reg.h

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4

drivers/gpu/drm/i915/intel_fbc.c

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